X-Git-Url: http://git.kpe.io/?p=avr_bc100.git;a=blobdiff_plain;f=BaseTinyFirmware%2FGCC%2FPWM.c;fp=BaseTinyFirmware%2FGCC%2FPWM.c;h=a84a357ab35baa538e515335c4eb7b6f41737a71;hp=9d205fc2703410e731abe05f92d8ef3d4186d3db;hb=89173ec9cd6f33843bf27c45be0f2f9be3f5f0ce;hpb=7997f136b12114035265bd082c854bff95fd73dc

diff --git a/BaseTinyFirmware/GCC/PWM.c b/BaseTinyFirmware/GCC/PWM.c
index 9d205fc..a84a357 100644
--- a/BaseTinyFirmware/GCC/PWM.c
+++ b/BaseTinyFirmware/GCC/PWM.c
@@ -11,14 +11,14 @@
  *      AVR463: Charging NiMH Batteries with BC100
  *
  * \par Documentation
- *      For comprehensive code documentation, supported compilers, compiler 
+ *      For comprehensive code documentation, supported compilers, compiler
  *      settings and supported devices see readme.html
  *
  * \author
  *      Atmel Corporation: http://www.atmel.com \n
  *      Support email: avr@atmel.com
  *
- * 
+ *
  * $Name$
  * $Revision: 2299 $
  * $RCSfile$
@@ -67,52 +67,52 @@ void PWM_Start(void)
 {
 	// Clear OC1B on compare match, enable PWM on comparator OCR1B.
 	TCCR1A = (1<<COM1B1)|(0<<COM1B0)|(1<<PWM1B);
-	
+
 	// Non-inverted PWM, T/C stopped.
 	TCCR1B = 0;
-	
+
 	// Copy shadow bits, disconnect OC1D.
 	TCCR1C = (TCCR1A & 0xF0);
-	
+
 	// No fault protection, use phase & frequency correct PWM.
 	TCCR1D = (0<<WGM11)|(1<WGM10);
-	
+
 	// Does not matter -- PWM6 mode not used.
 	TCCR1E = 0;
-	
+
 	// Does not matter -- OC1A is disabled.
 	OCR1A = 0;
-	
+
 	// Set reset compare level. (Offset is used, or JumperCheck() will fail.)
 	OCR1B = PWM_OFFSET;
-	
+
 	// TOP value for PWM, f(PWM) = 64MHz / 255 = 251kHz.
 	OCR1C = 0xFF;
-	
+
 	// Does not matter -- OC1D is disabled.
 	OCR1D = 0;
-	
+
 	// No dead time values.
 	DT1 = 0;
-	
+
 	// Set PWM port pin to output.
 	DDRB |= (1<<PB3);
-	
+
 	// Enable PLL, use full speed mode.
 	PLLCSR = (0<<LSM) | (1<<PLLE);
-	
+
 	// Use general timer and wait 1 ms for PLL lock to settle.
 	Time_Set(TIMER_GEN,0,0,1);
-	do{ 
+	do{
 	}while(Time_Left(TIMER_GEN));
-	
+
 	// Now wait for PLL to lock.
-	do{ 
+	do{
 	}while((PLLCSR & (1<<PLOCK)) == 0);
 
 	// Use PLL as clock source.
 	PLLCSR |= (1<<PCKE);
-	
+
 	// CLK PCK = 64MHz / 1 = 64MHz.
 	TCCR1B |= (0<<CS13)|(0<<CS12)|(0<<CS11)|(1<<CS10);
 }
@@ -139,9 +139,9 @@ unsigned char PWM_IncrementDutyCycle(void){
  * \retval TRUE Success, duty cycle could be decremented.
  * \retval FALSE Failure, duty cycle already at zero.
  */
-unsigned char PWM_DecrementDutyCycle(void){
-	
-	if (OCR1B > 0)	{
+unsigned char PWM_DecrementDutyCycle(void) {
+
+	if (OCR1B > 0) {
 		OCR1B -= 1;
 		return(TRUE);
 	} else {