/*****************************************************************************
* FILE IDENTIFICATION
*
**   Name:          serial_lcd.S
**   Purpose:       Serial LCD Backpack code for GCC Assembler
**   Programmer:    Kevin Rosenberg <kevin@rosenberg.net> (AVR Freaks member kmr)
**   Date Started:  April 2008
**
**   Copyright (c) 2008 by Kevin Rosenberg
*******************************************************************************/

        #include <avr/io.h>
#ifndef F_CPU
#define F_CPU 14745600UL
#endif

#define CONSERVATIVE_ENABLE_DURATION 0
#define USE_CTS 0

/*************************************************************/
/*************************************************************/

/*	//// From the LCD perspective \\\\
        RxD --> PORTD:0
        LED <-- PORTD:1 // High = ON, Low = OFF
        J_1 --> PORTD:2 // BAUD rate select
        J_2 --> PORTD:3 // BAUD rate select
        LCD:R/W <-- PORTD:4
        LCD:RS <-- PORTD:5
        LCD:E <-- PORTD:6
        N/A <-> PORTD:7

        LCD:R/W <-- PORTD:4
        LCD:RS <-- PORTD:5
        LCD:E <-- PORTD:6
        LCD:Vee <-- CONTRAST
        LCD:DB0 <-- PORTB:0
        LCD:DB1 <-- PORTB:1
        LCD:DB2 <-- PORTB:2
        LCD:DB3 <-- PORTB:3
        LCD:DB4 <-- 4.7K Ohm <-- PORTx:4
        LCD:DB5 <-- 4.7K Ohm <-- PORTx:5
        LCD:DB6 <-- 4.7K Ohm <-- PORTx:6
        LCD:DB7 <-- 4.7K Ohm <-- PORTx:7

	//// From the I/O PORTx perspective \\\\
        PORTD:0 <--RxD
        PORTD:1 --> LED // High = ON, Low = OFF
        PORTD:2 <-- J_1 // BAUD rate select
        PORTD:3 <-- J_2 // BAUD rate select
        PORTD:4 --> LCD:R/W
        PORTD:5 --> LCD:RS
        PORTD:6 --> LCD:E
        PORTD:7 <-> N/A

        PORTB:0 --> LCD:DB0
        PORTB:1 --> LCD:DB1
        PORTB:2 --> LCD:DB2
        PORTB:3 --> LCD:DB3
        PORTB:4 --> 4.7K Ohm --> LCD:DB4
        PORTB:5 --> 4.7K Ohm --> LCD:DB5
        PORTB:6 --> 4.7K Ohm --> LCD:DB6
        PORTB:7 --> 4.7K Ohm --> LCD:DB7
*/

/*************************************************************/
/*************************************************************/
// If you want to use a different I/O port for LCD control & data,
// do it here!!!
#define LCD_DATA_PORT PORTB
#define LCD_DATA_PIN_REG PINB
#define LCD_DATA_DIR DDRB

#define LCD_CONTROL_PORT PORTD
#define LCD_CONTROL_PIN_REG PIND
#define LCD_CONTROL_DIR DDRD

// LED backlight control pin
#define LED_DIR DDRD
#define LED_PORT PORTD
#define LED_PIN PD1

// LCD Read/Write Pin
#define LCD_RW PD4
// LCD Register Select Pin
#define LCD_RS PD5
// LCD Enable Pin
#define LCD_E PD6
/*************************************************************/
/*************************************************************/

// LCD busy status pin
#define LCD_BUSY PB7

// BAID rate setting pins
#define BAUD_PORT PORTD
#define BAUD_DIR  DDRB
#define BAUD_PIN_REG PIND
#define BAUD_J1 PD2
#define BAUD_J2 PD3

#if USE_CTS
// Direction register for clear to send signal
#define CTS_DIR DDRA
// Output port for clear to send signal
#define CTS_PORT PORTA
// Pin for clear to send signal (RESET pin on Tiny2313)
// Ensure fuse is set to disable RESET function on RESET pin
#define CTS_PIN PA2
#endif

// Number of PWM brightness levels supported
#define LED_BRIGHTNESS_LEVELS 8

////// LCD Commands ///////
// Turn on power to the display, no cursor
#define	LCD_ON	0x0C
// Clear display command
#define LCD_CLR 0x01
// Set 4 data bits
#define LCD_4_Bit 0x20
// Set 8 data bits
#define LCD_8_Bit 0x30
// Set number of lines
#define LCD_4_Line 0x08
// Set 8 data bits
#define	DATA_8	0x30
// Set character font
#define LCD_Font 0x04
// Turn the cursor on
#define LCD_CURSOR_ON 0x02
// Turn on cursor blink
#define LCD_CURSOR_BLINK 0x01

////// Serial command codes ///////
// ASCII control code to set brightness level
// Next byte is brightness ranging from 0 (no backlight) to 255 (max backlight)
#define LED_SET_BRIGHTNESS 0xFB
// ASCII control code turns on LED
#define LED_SW_ON 0xFC
// ASCII control code turns off LED
#define LED_SW_OFF 0xFD
// Character generator RAM command
#define REG_MODE 0xFE

// Circular buffer for UART RX
#define UART_RX_BUFFER_SIZE 48
.section .data
sUartRxBuf:
        .org 0
sUartTxBufEnd:
        .org sUartRxBuf + UART_RX_BUFFER_SIZE

.section .text

// Actual baud rate = 9600 BAUD, (0.0% error) @ 14.7456MHz
// Actual baud rate = 19.2K BAUD, (0.0% error) @ 14.7456MHz
// Actual baud rate = 38.4K BAUD, (0.0% error) @ 14.7456MHz
// Actual baud rate = 115.2K BAUD, (0.0% error) @ 14.7456MHz
#define BAUD_4800 191
#define BAUD_9600 95
#define BAUD_14400 63
#define BAUD_19200 47
#define BAUD_28800 31
#define BAUD_38400 23
#define BAUD_57600 15
#define BAUD_76800 11
#define BAUD_115200 7
        
BaudLookupTable:
        .byte BAUD_115200
        .byte BAUD_38400
        .byte BAUD_19200
        .byte BAUD_9600

// PWM Patterns (8-brightness levels)
ledPwmPatterns: 
        .byte 0x10 // 0b00010000  0
        .byte 0x11 // 0b00010001  1
        .byte 0x4A // 0b01001010  2
        .byte 0x55 // 0b01010101  3
        .byte 0x5D // 0b01011101  4
        .byte 0xEE // 0b11101110  5
        .byte 0x7F // 0b11110111  6
        .byte 0xFF // 0b11111111  7


// PWeh must be 230nS minimum, nop = 67nS @ 14.7456MHz
// At 4 cycles, E = 271nS
// Some slow systems require 450ns, or 7 cycles at 14.7456MHz
#if CONSERVATIVE_ENABLE_DURATION
.macro ENABLE_WAIT
       rjmp    1f
1:     rjmp    2f
2:     rjmp    3f
3:     nop
.endm
#else
.macro ENABLE_WAIT
       rjmp    1f
1:     rjmp    2f
2:      
.endm
#endif

// register variables
#define zeroReg       r1
#define saveSregReg   r2
#define ledPwmCycling r3
#define isrTemp1      r16
#define isrTemp2      r17
#define isrTemp3      r18
#define ledPwmCount   r19
#define ledStatus     r20        
#define sUartRxHead   r21
#define sUartRxTail   r22
#define returnReg1    r23
#define loadReg       r24
#define ledPwmPattern r25
#define tmpReg1       r26
#define tmpReg2       r27
#define tmpReg3       r28
#define tmpReg4       r29
        
.macro LedTimerStop
        out     _SFR_IO_ADDR(TCCR0B), zeroReg
.endm        
.macro LedTimerStart
// Start with 256 prescaler
        ldi     loadReg, (1<<CS02)
        out     _SFR_IO_ADDR(TCCR0B), loadReg
.endm

.macro BACKLIGHT_OFF
        cbr     ledStatus, 0
.endm

.macro BACKLIGHT_ON
        sbr     ledStatus, 0
.endm

.macro LedPwmSwitchOff
        cbi     _SFR_IO_ADDR(LED_PORT), LED_PIN
        BACKLIGHT_OFF
        LedTimerStop
.endm

.macro LedPwmSwitchOn
        // if (ledPwmPattern == 0xFF) { 
        //  LedTimerStop();
        //  LED_PORT |= (1<<LED_PIN); // keep LED on at all times
        // } else {
        //  LedTimerStart();
        // }
        BACKLIGHT_ON
        cpi     ledPwmPattern, 0xFF
        breq    1f
        LedTimerStart
        rjmp    2f
1:     LedTimerStop                            ; maximum brightness, no need for PWM
        sbi     _SFR_IO_ADDR(LED_PORT), LED_PIN ; keep LED on at al times
2:     
.endm

.macro StoreSREG
// Start with 256 prescaler
        in      saveSregReg, _SFR_IO_ADDR(SREG)
.endm        
.macro RestoreSREG
// Start with 256 prescaler
        out      _SFR_IO_ADDR(SREG), saveSregReg
.endm        

.macro LedPwmInit
  // setup PWM to run at 1.25ms per interrupt.
  // This allows 8 levels of brightness at minimum of 100Hz flicker rate.
        ldi     loadReg, (1<<WGM01)      // CTC mode
        out     _SFR_IO_ADDR(TCCR0A), loadReg 
        out     _SFR_IO_ADDR(TCCR0B), zeroReg   // timer off
        ldi     loadReq, 72            // 1.25ms with CLK/256 prescaler @ 14.7456MHz
        out     _SFR_IO_ADDR(OCR0A), loadReg
        ldi     loadReg, (1<<OCIE0A)      // Turn on timer0 COMPA intr (all other timer intr off)
        out     _SFR_IO_ADDR(TIMSK), loadReg
        cbi     _SFR_IO_ADDR(LED_PORT), LED_PIN // Ensure LED is off during initialization
        sbi     _SFR_IO_ADDR(LED_DIR), LED_PIN  // Ensure LED is output direction
        BACKLIGHT_OFF
        ldi     ledPwmPattern, 0xFF     // maximum brightness
.endm



 // Initialize USART
.macro UsartInit
        out     _SFR_IO_ADDR(UCSRB), zeroReg   // Disable while setting baud rate
        out     _SFR_IO_ADDR(UCSRA), zeroReg 
        ldi     loadReg, ((1<<UCSZ1) | (1<<UCSZ0)) // 8 bit data
        out     _SFR_IO_ADDR(UCSRC), loadReg

        in      loadReg, _SFR_IO_ADDR(BAUD_PIN_REG)   // Get BAUD rate jumper settings
        andi    loadReg, ((1<<BAUD_J2) | (1<<BAUD_J1))    // Mask off unwanted bits
        // BAUD_J2 = PD.3, BAUD_J1 = PD.2
        // This is two bits too far to the left and the array index will
        // increment by 4, instead of 1.
        // Shift BAUD_J2 & BAUD_J1 right by two bit positions for proper array indexing
        asr     loadReg
        asr     loadReg
        ldi     ZH, lo8(BaudLookupTable)
        ldi     ZL, hi8(BaudLookupTable)
        add     ZL, loadReg
        adc     ZH, zeroReg
        lpm     r0, Z
        out     _SFR_IO_ADDR(UBRRL), r0    // Set baud rate
        out     _SFR_IO_ADDR(UBRRH), zeroReg  // Set baud rate hi
        ldi     loadReg, ((1<<RXEN)|(1<<RXCIE)) // RXEN = Enable
        out     _SFR_IO_ADDR(UCSRB), loadReg
        clr     sUartRxHead  // register variable, need to explicitly zero
        clr     sUartRxTail  // register variable, need to explicitly zero

#if USE_CTS
        sbi     _SFR_IO_ADDR(CTS_PORT), CTS_PIN // bring signal high
        sbi     _SFR_IO_ADDR(CTS_DIR), CTS_PIN // CTS is active low
#endif
.endm

.macro LcdInit
        ldi     loadReg, ((1<<BAUD_J2) | (1<<BAUD_J1))    // Set BAUD_J2:BAUD_J1 PULL-UPS active
        out     _SFR_IO_ADDR(LCD_CONTROL_PORT), loadReg
        ldi     loadReg, 0xF2 // Set LCD_control BAUD_J2:BAUD_J1 to inputs
        out     _SFR_IO_ADDR(LCD_CONTROL_DIR), loadReg      

        // delay 4100 ms
        ldi     tmpReg1, 255
        ldi     tmpReg2, 127
        ldi     tmpReg3, 50
        ldi     tmpReg4, 2
dl2:    subi    tmpReg1, 1
        sbc     tmpReg2, zeroReg
        sbc     tmpReg3, zeroReg
        sbc     tmpReg4, zeroReg
        brne    dl2
        rjmp    dj2
dj2:    nop

        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RS   // Set LCD_RS high

        // Initialize the LCD Data AVR I/O
        ldi     loadReg, 0xFF // Set LCD_DATA_PORT as all outputs
        out     _SFR_IO_ADDR(LCD_DATA_DIR), loadReg
        out     _SFR_IO_ADDR(LCD_DATA_PORT), zeroReg // Set LCD_DATA_PORT to logic low

        // Initialize the LCD controller
        cbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RS
        ldi     returnReg1, DATA_8
        rcall   LcdWriteData

        // delay 4100 ms
        ldi     tmpReg1, 255
        ldi     tmpReg2, 127
        ldi     tmpReg3, 184
dl0:    subi    tmpReg1, 1
        sbc     tmpReg2, zeroReg
        sbc     tmpReg3, zeroReg
        brne    dl0
        rjmp    dj0
dj0:    nop
        
        rcall   LcdWriteData

        // Delay 100uS
        ldi     tmpReg1, 112
        ldi     tmpReg2, 1
dl1:    subi    tmpReg1, 1
        sbc     tmpReg2, zeroReg
        brne    dl1
        rjmp    dj1
dj1:
        
        rcall   LcdWriteData
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RS

        // The display will be out into 8 bit data mode here
        ldi     loadReg, (LCD_8_Bit | LCD_4_Line); // Set 8 bit data, 4 display lines
        rcall   LcdWriteCmd
        ldi     loadReg, LCD_ON // Power up the display
        rcall   LcdWriteCmd
        ldi     loadReg, LCD_CLR // Clear display
        rcall   LcdWriteCmd
.endm

;;; Pass brightness (0-255) in returnReg1
LedPwmSetBrightness:
        cpi     returnReg1, 0
        brne    brightnessNotZero
        // turn backlight off for 0 brightness

        sbrc    ledStatus, 0    ; Check if backlight on
        rjmp    ledNotOn
        LedTimerStop
        mov     ledPwmPattern, zeroReg
        mov     ledPwmCycling, zeroReg
        cbi     _SFR_IO_ADDR(LED_PORT), LED_PIN
ledNotOn:       
        ret

brightnessNotZero:      
        // ledPwmPos = (brightness * (LED_BRIGHTNESS_LEVELS-1) + (unsigned int) 127) >> 8;
        mov     tmpReg1, returnReg1
        mov     tmpReg2, zeroReg
        mov     tmpReg3, (LED_BRIGHTNESS_LEVELS-2)
brightMultLoop:
        add     tmpReg1, returnReg1
        adc     tmpReg2, zeroReg
        dec     tmpReg3
        brne    brightMultLoop
        ldi     loadReg, 127
        add     tmpReg1, loadReg
        adc     tmpReg2, zeroReg
        // ledPwmPos now in tmpReg2
        
        // Below is probably not required, but ensures we don't exceed array
        // if (ledPwmPos > LED_BRIGHTNESS_LEVELS - 1)
        //      ledPwmPos = LED_BRIGHTNESS_LEVELS - 1;
        cpi     tmpReg2, LED_BRIGHTNESS_LEVELS - 1
        brlo    brightMax
        ldi     tmpReg2, LED_BRIGHTNESS_LEVELS - 1
brightMax:      
        //      ledPwmPattern = PGM_READ_BYTE (&ledPwmPatterns[ledPwmPos]);
        ldi     ZL,lo8(ledPwmPatterns)
        ldi     ZH,hi8(ledPwmPatterns)
        add     ZL, tmpReg3
        adc     ZH, zeroReg
        lpm     r0,Z    // ledPwmPos is in r0
        mov     tmpReg2, r0
        mov     ledPwmCount, zeroReg
        mov     ledPwmCycling, ledPwmPattern

        cpi     tmpReg2, (LED_BRIGHTNESS_LEVELS-1) // compare to maxmimum brightness
        brsh    brightSetMax
        // if (IS_BACKLIGHT_ON()) LedTimerStart();
        ret
brightSetMax:
        sbrc    ledStatus, 0
        // don't need PWM for continuously on
        ret
        LedTimerStop
        sbi     _SFR_IO_ADDR(LED_PORT), LED_PIN
        ret
        
.global main
main:
        clr     zeroReg
        wdr

        ldi     loadReg, (1<<WDCE)|(1<<WDE); // start timed sequence (keep old prescaler)
        out     _SFR_IO_ADDR(WDTCSR), loadReg
        ldi     loadReg, (1<<WDE)|(1<<WDP3)|(1<<WDP0); // 1024K cycles, 8.0sec
        out     _SFR_IO_ADDR(WDTCSR), loadReg

        in      loadReg, _SFR_IO_ADDR(MCUCR)
        andi    loadReg, ~((1<<SM1)|(1<<SM0)); // use idle sleep mode
        out     _SFR_IO_ADDR(MCUCR), loadReg

        LcdInit 

        // Initialize the AVR USART
        UsartInit               

        sei
mainLoop:
        wdr
        cp      sUartRxTail, sUartRxHead
        breq    mainNoChars
        rcall   WaitRxChar

        cpi     returnReg1, LED_SW_OFF
        brne    main1
        LedPwmSwitchOff
        rjmp    mainLoop
main1:  cpi     returnReg1, LED_SW_ON
        brne    main2
        LedPwmSwitchOn
        rjmp    mainLoop
main2:  cpi     returnReg1, LED_SET_BRIGHTNESS
        brne    main3
        rcall   WaitRxChar  // read next byte which will be brightness
        rcall   LedPwmSetBrightness
        rjmp    mainLoop
main3:  cpi     returnReg1, REG_MODE
        brne    main4
        rcall   WaitRxChar
        rcall   LcdWriteCmd // Send LCD command character
        rjmp    mainLoop
main4:
        rcall   LcdWriteData // Send LCD data character
        rjmp    mainLoop

mainNoChars:    
      // No characters waiting in RX buffer
        cli
        wdr
        
        in      loadReg, _SFR_IO_ADDR(MCUSR)
        cbr     loadReg, WDRF // clear any watchdog interrupt flags
        out     _SFR_IO_ADDR(MCUSR), loadReg

        in      loadReg, _SFR_IO_ADDR(WDTCSR)
        ori     loadReg, (1<<WDCE)|(1<<WDE); // start timed sequence (keep old prescaler)
        out     _SFR_IO_ADDR(WDTCSR), loadReg
        cbr     loadReg, WDE  // watchdog timer off
        out     _SFR_IO_ADDR(WDTCSR), loadReg

        sei
        in      loadReg, _SFR_IO_ADDR(MCUCR)
        sbr     loadReg, SE
        out     _SFR_IO_ADDR(MCUCR), loadReg
        sleep
        in      loadReg, _SFR_IO_ADDR(MCUCR)
        cbr     loadReg, SE
        out     _SFR_IO_ADDR(MCUCR), loadReg

        cli
        wdr

        in      loadReg, _SFR_IO_ADDR(WDTCSR)
        ori     loadReg, (1<<WDCE)|(1<<WDE); // start timed sequence (keep old prescaler)
        out     _SFR_IO_ADDR(WDTCSR), loadReg
        cbr     loadReg, WDE // watchdog timer off
        out     _SFR_IO_ADDR(WDTCSR), loadReg

        sei
        ret

;; input cmd in returnReg1
LcdWriteCmd:    
        rcall   LcdBusyWait
        out     _SFR_IO_ADDR(LCD_DATA_PORT), returnReg1
        nop
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_E
        ENABLE_WAIT
        cbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_E
        nop
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RS // Set display to "Character mode"
        ret

// write character in returnReg1
LcdWriteData:
        rcall   LcdBusyWait
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RS // Set display to "Character Mode"
        out     _SFR_IO_ADDR(LCD_DATA_PORT), returnReg1
        nop
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_E
        ENABLE_WAIT
        cbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_E
        ret

        
;;;  Waits for LCD to stop being busy, returns LCD status in returnReg1
LcdBusyWait:    
        out     LCD_DATA_DIR, zeroReg // Set LCD data port to inputs
        // LCD_CONTROL_PORT &= ~(1<<LCD_RS); // Set display to "Register mode"
        cbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RS 
        // LCD_CONTROL_PORT |= (1<<LCD_RW); // Put the display in the read mode
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RW
        nop
LcdBusyLoop:
        wdr
        // LCD_CONTROL_PORT |= (1<<LCD_E);
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_E
        ENABLE_WAIT
        in      returnReg1, _SFR_IO_ADDR(LCD_DATA_PIN_REG)
        // LCD_CONTROL_PORT &= ~(1<<LCD_E);
        sbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_E
        // } while (LCDStatus & (1<<LCD_BUSY));
        sbrc    returnReg1, LCD_BUSY
        rjmp    LcdBusyLoop
        // LCD_CONTROL_PORT &= ~(1<<LCD_RW); // Put display in write mode
        cbi     _SFR_IO_ADDR(LCD_CONTROL_PORT), LCD_RW
        // LCD_DATA_DIR = 0xFF; // Set LCD data port to outputs
        ldi     loadReg, 0xFF
        out     _SFR_IO_ADDR(LCD_DATA_DIR), loadReg
        ret                     
        
;;; Waits for a UART RX character and returns it in returnReg1 
WaitRxChar:     
        // waits for next RX character, then return it
        cp      sUartRxTail, sUartRxHead
        wdr
        breq    WaitRxChar

#if USE_CTS
  // turn off interrupts so that if UART char ready to be stored, then storage
  // will occur after CTS pin is set active. This allows UART ISR to set
  // CTS inactive if byte fills buffer after we remove current byte
  cli();
#endif

        // increment tail position
        // if (tail == UART_RX_BUFFER_SIZE-1) sUartRxTail = 0  else  sUartRxTail++;
        inc     sUartRxTail
        cpi     sUartRxTail, UART_RX_BUFFER_SIZE
        brne    waitRxBufIncremented
        clr     sUartRxTail
waitRxBufIncremented:
        
#if USE_CTS
  CTS_PORT |= (1<<CTS_PIN); // Ensure CTS is active since just removed a byte
  sei();   // Allow UART ISR to read character and change potentially change CTS
#endif

        ldi     ZL, lo8(sUartRxBuf)
        ldi     ZH, hi8(sUartRxBuf)
        add     ZL, sUartRxTail
        adc     ZH, zeroReg
        ld      returnReg1, Z
        ret


.global TIMER0_COMPA_vect
TIMER0_COMPA_vect:
        StoreSREG
        sei             // Okay to allow USART interrupts while controlling LED PWM

        // Set current LED state based on cycling variable
        //  if (ledPwmCycling & 0x01)  LED_PORT |= (1<<LED_PIN); else LED_PORT &= ~(1<<LED_PIN);
        in      isrTemp3,_SFR_IO_ADDR(LED_PORT)
        sbr     isrTemp3, LED_PIN
        sbrc    ledPwmCycling, 0
        cbr     isrTemp3, LED_PIN
        out     _SFR_IO_ADDR(LED_PORT), isrTemp3

 // Update cycling variable for next interrupt
//  if (ledPwmCount >= LED_BRIGHTNESS_LEVELS-1) {
//    ledPwmCount = 0;
//    ledPwmCycling = ledPwmPattern;
//  } else {
//    ledPwmCount++;
//    ledPwmCycling >>= 1;
//  }
//}
        cpi     ledPwmCount, (LED_BRIGHTNESS_LEVELS - 1)
        brsh    tcIsrResetCount
        inc     ledPwmCount
        asr     ledPwmCycling
        rjmp    tcIsrDone
tcIsrResetCount:
        clr     ledPwmCount
        mov     ledPwmCycling, ledPwmPattern

tcIsrDone:      
        RestoreSREG
        reti


        .global USART_RX_vect
USART_RX_vect:  
        StoreSREG
        // check for frame error
        sbic    _SFR_IO_ADDR(UCSRA), FE
        // framing error. Currrently, this is silently ignored
        // real applications may wish to output information to LCD to indicate
        // erroroneous byte received
        rjmp    urxIsrDone
        
        in      isrTemp1, _SFR_IO_ADDR(UDR)
        // Calculate next buffer position.
        // tmphead = sUartRxHead;
        // if (tmphead == UART_RX_BUFFER_SIZE-1)
        //        tmphead = 0;
        // else
        //        tmphead++;
        clr     isrTemp2
        cpi     sUartRxHead, (UART_RX_BUFFER_SIZE-1)
        breq    urxIsrAtEnd
        mov     isrTemp2, sUartRxHead
        inc     isrTemp2
urxIsrAtEnd:
        // store in buffer if there is room
        //  if (tmphead != sUartRxTail) {
        //    sUartRxHead = tmphead;         // Store new index.
        //    sUartRxBuf[tmphead] = rx;
        //  }
        cp      isrTemp2, sUartRxTail
        breq    urxIsrNoRoom
        mov     sUartRxHead, isrTemp2
        push    ZL
        push    ZH
        ldi     ZL, lo8(sUartRxBuf)
        ldi     ZH, hi8(sUartRxBuf)
        add     ZL, isrTemp2
        adc     ZH, 0
        st      Z, isrTemp1
        pop     ZH
        pop     ZL
urxIsrNoRoom:
        
#if USE_CTS
  // check if buffer is now full, if so switch CTS to inactive
  if (tmphead == UART_RX_BUFFER_SIZE-1)
    tmphead = 0;
  else
    tmphead++;
  // CTS active if still room in buffer
  if (tmphead != sUartRxTail) {
    CTS_PORT |= (1<<CTS_PIN);
  } else {
    // no room left in buffer, so make CTS inactive
    CTS_PORT &= ~(1<<CTS_PIN);
  }
#endif
urxIsrDone:
        RestoreSREG
        reti