From: Kevin M. Rosenberg Date: Sat, 19 Jul 2003 20:32:48 +0000 (+0000) Subject: r5339: *** empty log message *** X-Git-Tag: v1.8.5~8 X-Git-Url: http://git.kpe.io/?p=md5.git;a=commitdiff_plain;h=7754da33f268165c13b26263e0dfb363c0698b6d r5339: *** empty log message *** --- diff --git a/debian/changelog b/debian/changelog index 09d727f..c9f780d 100644 --- a/debian/changelog +++ b/debian/changelog @@ -1,3 +1,9 @@ +cl-md5 (1.8.2-1) unstable; urgency=low + + * Fix compilation on Allegro's case sensitive mode + + -- Kevin M. Rosenberg Thu, 17 Jul 2003 12:59:34 -0600 + cl-md5 (1.8.1-1) unstable; urgency=low * Improve .asd file diff --git a/md5.lisp b/md5.lisp index 7349948..d525650 100644 --- a/md5.lisp +++ b/md5.lisp @@ -5,7 +5,7 @@ ;;;; cmucl-help mailing-list hosted at cons.org, in November 2001 and ;;;; has been placed into the public domain. ;;;; -;;;; $Id: md5.lisp,v 1.5 2003/05/06 04:59:21 kevin Exp $ +;;;; $Id: md5.lisp,v 1.6 2003/07/19 20:32:48 kevin Exp $ ;;;; ;;;; While the implementation should work on all conforming Common ;;;; Lisp implementations, it has only been optimized for CMU CL, @@ -207,9 +207,9 @@ accordingly." (declare (type md5-regs regs) (type (simple-array ub32 (16)) block) (optimize (speed 3) (safety 0) (space 0) (debug 0))) - (let ((a (md5-regs-a regs)) (b (md5-regs-b regs)) - (c (md5-regs-c regs)) (d (md5-regs-d regs))) - (declare (type ub32 a b c d)) + (let ((A (md5-regs-a regs)) (B (md5-regs-b regs)) + (C (md5-regs-c regs)) (D (md5-regs-d regs))) + (declare (type ub32 A B C D)) ;; Round 1 (with-md5-round (f block) (A B C D 0 7 1)(D A B C 1 12 2)(C D A B 2 17 3)(B C D A 3 22 4) @@ -235,10 +235,10 @@ accordingly." (A B C D 8 6 57)(D A B C 15 10 58)(C D A B 6 15 59)(B C D A 13 21 60) (A B C D 4 6 61)(D A B C 11 10 62)(C D A B 2 15 63)(B C D A 9 21 64)) ;; Update and return - (setf (md5-regs-a regs) (mod32+ (md5-regs-a regs) a) - (md5-regs-b regs) (mod32+ (md5-regs-b regs) b) - (md5-regs-c regs) (mod32+ (md5-regs-c regs) c) - (md5-regs-d regs) (mod32+ (md5-regs-d regs) d)) + (setf (md5-regs-a regs) (mod32+ (md5-regs-a regs) A) + (md5-regs-b regs) (mod32+ (md5-regs-b regs) B) + (md5-regs-c regs) (mod32+ (md5-regs-c regs) C) + (md5-regs-d regs) (mod32+ (md5-regs-d regs) D)) regs)) ;;; Section 3.4: Converting 8bit-vectors into 16-Word Blocks