BaseTinyFirmware/IAR/Release/List/time.s90

   1 ///////////////////////////////////////////////////////////////////////////////\r
   2 //                                                                            /\r
   3 // IAR Atmel AVR C/C++ Compiler V4.30F/W32              13/Mar/2008  04:52:03 /\r
   4 // Copyright 1996-2007 IAR Systems. All rights reserved.                      /\r
   5 //                                                                            /\r
   6 //    Source file           =  C:\home\kevin\pub\src\bc100\IAR\time.c         /\r
   7 //    Command line          =  C:\home\kevin\pub\src\bc100\IAR\time.c         /\r
   8 //                             --cpu=tiny861 -ms -o C:\home\kevin\pub\src\bc1 /\r
   9 //                             00\IAR\Release\Obj\ -D NDEBUG -lCN             /\r
  10 //                             C:\home\kevin\pub\src\bc100\IAR\Release\List\  /\r
  11 //                             -lB C:\home\kevin\pub\src\bc100\IAR\Release\Li /\r
  12 //                             st\ --initializers_in_flash -s9                /\r
  13 //                             --no_cross_call --no_tbaa                      /\r
  14 //                             -DENABLE_BIT_DEFINITIONS -e -I "C:\Program     /\r
  15 //                             Files\IAR Systems\Embedded Workbench           /\r
  16 //                             4.0\avr\INC\" -I "C:\Program Files\IAR         /\r
  17 //                             Systems\Embedded Workbench 4.0\avr\INC\CLIB\"  /\r
  18 //                             --eeprom_size 512 --misrac=5-9,11-12,14,16-17, /\r
  19 //                             19-21,24-26,29-32,34-35,38-39,42-43,46,50,     /\r
  20 //                             52-54,56-59,61-62,64-65,68-80,83-84,87-91,     /\r
  21 //                             94-95,98-100,103-110,112-126                   /\r
  22 //    Enabled MISRA C rules =  5-9,11-12,14,16-17,19-21,24-26,29-32,34-35,    /\r
  23 //                             38-39,42-43,46,50,52-54,56-59,61-62,64-65,     /\r
  24 //                             68-80,83-84,87-91,94-95,98-100,103-110,112-126 /\r
  25 //      Checked             =  5,7-9,11-12,14,17,19-21,24,29-32,34-35,38-39,  /\r
  26 //                             42,46,50,52-54,56-59,61-62,64,68-69,71-80,     /\r
  27 //                             83-84,87-89,91,94-95,98,100,104-105,108-109,   /\r
  28 //                             112-115,118-126                                /\r
  29 //      Not checked         =  6,16,25-26,43,65,70,90,99,103,106-107,110,     /\r
  30 //                             116-117                                        /\r
  31 //    List file             =  C:\home\kevin\pub\src\bc100\IAR\Release\List\t /\r
  32 //                             ime.s90                                        /\r
  33 //                                                                            /\r
  34 //                                                                            /\r
  35 ///////////////////////////////////////////////////////////////////////////////\r
  36 \r
  37         NAME time\r
  38 \r
  39         RSEG CSTACK:DATA:NOROOT(0)\r
  40         RSEG RSTACK:DATA:NOROOT(0)\r
  41 \r
  42         EXTERN ?L_MUL_L03\r
  43         EXTERN ?Register_R4_is_cg_reg\r
  44         EXTERN ?Register_R5_is_cg_reg\r
  45         EXTERN ?Register_R6_is_cg_reg\r
  46         EXTERN ?Register_R8_is_cg_reg\r
  47         EXTERN ?need_segment_init\r
  48 \r
  49         PUBWEAK `?<Segment init: NEAR_Z>`\r
  50         PUBWEAK `??TICK_ISR??INTVEC 28`\r
  51         PUBLIC TICK_ISR\r
  52         PUBLIC Time_Init\r
  53         PUBLIC Time_Left\r
  54         PUBLIC Time_Set\r
  55         PUBLIC Time_Start\r
  56         PUBLIC Time_Stop\r
  57         PUBWEAK _A_OCR0A\r
  58         PUBWEAK _A_OCR0B\r
  59         PUBWEAK _A_TCCR0A\r
  60         PUBWEAK _A_TCCR0B\r
  61         PUBWEAK _A_TIMSK\r
  62         PUBWEAK __?EEARH\r
  63         PUBWEAK __?EEARL\r
  64         PUBWEAK __?EECR\r
  65         PUBWEAK __?EEDR\r
  66         PUBLIC timeval\r
  67 \r
  68 TICK_ISR            SYMBOL "TICK_ISR"\r
  69 `??TICK_ISR??INTVEC 28` SYMBOL "??INTVEC 28", TICK_ISR\r
  70 \r
  71 // C:\home\kevin\pub\src\bc100\IAR\time.c\r
  72 //    1 /* This file has been prepared for Doxygen automatic documentation generation.*/\r
  73 //    2 /*! \file *********************************************************************\r
  74 //    3  *\r
  75 //    4  * \brief\r
  76 //    5  *      Functions for timing\r
  77 //    6  *\r
  78 //    7  *      Contains functions to initialize, set, poll and stop timers.\r
  79 //    8  *\r
  80 //    9  * \par Application note:\r
  81 //   10  *      AVR458: Charging Li-Ion Batteries with BC100 \n\r
  82 //   11  *      AVR463: Charging NiMH Batteries with BC100\r
  83 //   12  *\r
  84 //   13  * \par Documentation\r
  85 //   14  *      For comprehensive code documentation, supported compilers, compiler \r
  86 //   15  *      settings and supported devices see readme.html\r
  87 //   16  *\r
  88 //   17  * \author\r
  89 //   18  *      Atmel Corporation: http://www.atmel.com \n\r
  90 //   19  *      Support email: avr@atmel.com\r
  91 //   20  *\r
  92 //   21  * \r
  93 //   22  * $Name$\r
  94 //   23  * $Revision: 2299 $\r
  95 //   24  * $RCSfile$\r
  96 //   25  * $URL: http://svn.norway.atmel.com/AppsAVR8/avr458_Charging_Li-Ion_Batteries_with_BC100/tag/20070904_release_1.0/code/IAR/time.c $\r
  97 //   26  * $Date: 2007-08-23 12:55:51 +0200 (to, 23 aug 2007) $\n\r
  98 //   27  ******************************************************************************/\r
  99 //   28 \r
 100 //   29 #include <ioavr.h>\r
 101 \r
 102         ASEGN ABSOLUTE:DATA:NOROOT,059H\r
 103 // <unnamed> volatile __io _A_TIMSK\r
 104 _A_TIMSK:\r
 105         DS 1\r
 106 \r
 107         ASEGN ABSOLUTE:DATA:NOROOT,053H\r
 108 // <unnamed> volatile __io _A_TCCR0B\r
 109 _A_TCCR0B:\r
 110         DS 1\r
 111 \r
 112         ASEGN ABSOLUTE:DATA:NOROOT,035H\r
 113 // <unnamed> volatile __io _A_TCCR0A\r
 114 _A_TCCR0A:\r
 115         DS 1\r
 116 \r
 117         ASEGN ABSOLUTE:DATA:NOROOT,033H\r
 118 // <unnamed> volatile __io _A_OCR0A\r
 119 _A_OCR0A:\r
 120         DS 1\r
 121 \r
 122         ASEGN ABSOLUTE:DATA:NOROOT,032H\r
 123 // <unnamed> volatile __io _A_OCR0B\r
 124 _A_OCR0B:\r
 125         DS 1\r
 126 //   30 #include <inavr.h>\r
 127 //   31 \r
 128 //   32 #include "enums.h"\r
 129 //   33 \r
 130 //   34 #include "main.h"\r
 131 //   35 #include "time.h"\r
 132 //   36 \r
 133 //   37 \r
 134 //   38 //******************************************************************************\r
 135 //   39 // Variables\r
 136 //   40 //******************************************************************************\r
 137 \r
 138         RSEG NEAR_Z:DATA:NOROOT(0)\r
 139         REQUIRE `?<Segment init: NEAR_Z>`\r
 140 //   41 unsigned long timeval[TIMERS];  //!< Contains the values for each timer.\r
 141 timeval:\r
 142         DS 16\r
 143 //   42 \r
 144 //   43 // timer runs at 1 MHz and overflow will occur every 255 / 1 Mz ~= 0.25 ms \r
 145 //   44 //#pragma vector = TIM0_OVF_vect\r
 146 //   45 \r
 147 //   46 \r
 148 //   47 //******************************************************************************\r
 149 //   48 // Functions\r
 150 //   49 //******************************************************************************\r
 151 //   50 /*! \brief Interrupt service routine for timer 0 overflow\r
 152 //   51  *\r
 153 //   52  * Timer 0 runs at 125 kHz and compare match will occur every millisecond\r
 154 //   53  * (125 / 125 kHz = 1.0 ms), which will result in a call to this function.\r
 155 //   54  * When called, this function will decrement the time left for each timer,\r
 156 //   55  * unless they are already at zero.\r
 157 //   56  */\r
 158 //   57 #pragma vector = TIM0_COMPA_vect\r
 159 \r
 160         RSEG CODE:CODE:NOROOT(1)\r
 161 //   58 __interrupt void TICK_ISR(void)\r
 162 TICK_ISR:\r
 163 //   59 {\r
 164         ST      -Y, R31\r
 165         ST      -Y, R30\r
 166         ST      -Y, R23\r
 167         ST      -Y, R22\r
 168         ST      -Y, R21\r
 169         ST      -Y, R20\r
 170         ST      -Y, R17\r
 171         ST      -Y, R16\r
 172         IN      R17, 0x3F\r
 173 //   60         unsigned char i;\r
 174 //   61 \r
 175 //   62         // 1 ms has passed, decrement all non-zero timers.\r
 176 //   63         for (i = 0; i < TIMERS; i++) {\r
 177         LDI     R30, LOW(timeval)\r
 178         LDI     R31, (timeval) >> 8\r
 179         LDI     R16, 4\r
 180 //   64                 if(timeval[i] > 0) {\r
 181 ??TICK_ISR_0:\r
 182         LD      R20, Z\r
 183         LDD     R21, Z+1\r
 184         LDD     R22, Z+2\r
 185         LDD     R23, Z+3\r
 186         OR      R20, R21\r
 187         OR      R20, R22\r
 188         OR      R20, R23\r
 189         BREQ    ??TICK_ISR_1\r
 190 //   65                         timeval[i]--;\r
 191         LD      R20, Z\r
 192         SUBI    R20, 1\r
 193         SBCI    R21, 0\r
 194         SBCI    R22, 0\r
 195         SBCI    R23, 0\r
 196         ST      Z, R20\r
 197         STD     Z+1, R21\r
 198         STD     Z+2, R22\r
 199         STD     Z+3, R23\r
 200 //   66                 }\r
 201 //   67         }\r
 202 ??TICK_ISR_1:\r
 203         ADIW    R31:R30, 4\r
 204         DEC     R16\r
 205         TST     R16\r
 206         BRNE    ??TICK_ISR_0\r
 207 //   68 }\r
 208         OUT     0x3F, R17\r
 209         LD      R16, Y+\r
 210         LD      R17, Y+\r
 211         LD      R20, Y+\r
 212         LD      R21, Y+\r
 213         LD      R22, Y+\r
 214         LD      R23, Y+\r
 215         LD      R30, Y+\r
 216         LD      R31, Y+\r
 217         RETI\r
 218 //   69 \r
 219 //   70 \r
 220 //   71 /*! \brief Checks if a specified timer has expired\r
 221 //   72  *\r
 222 //   73  * \param timer Specifies timer\r
 223 //   74  *\r
 224 //   75  * \retval TRUE Timer still going.\r
 225 //   76  * \retval FALSE Timer has expired.\r
 226 //   77  */ \r
 227 \r
 228         RSEG CODE:CODE:NOROOT(1)\r
 229 //   78 unsigned char Time_Left(unsigned char timer)\r
 230 Time_Left:\r
 231 //   79 {\r
 232 //   80         if(timeval[timer] > 0) {\r
 233         LDI     R17, 0\r
 234         LSL     R16\r
 235         ROL     R17\r
 236         LSL     R16\r
 237         ROL     R17\r
 238         MOVW    R31:R30, R17:R16\r
 239         SUBI    R30, LOW((-(timeval) & 0xFFFF))\r
 240         SBCI    R31, (-(timeval) & 0xFFFF) >> 8\r
 241         LD      R16, Z\r
 242         LDD     R17, Z+1\r
 243         LDD     R18, Z+2\r
 244         LDD     R19, Z+3\r
 245         OR      R16, R17\r
 246         OR      R16, R18\r
 247         OR      R16, R19\r
 248         BREQ    ??Time_Left_0\r
 249 //   81                 return(TRUE);\r
 250         LDI     R16, 1\r
 251         RET\r
 252 //   82         } else {\r
 253 //   83                 return(FALSE);\r
 254 ??Time_Left_0:\r
 255         LDI     R16, 0\r
 256         RET\r
 257 //   84         }\r
 258 //   85 }\r
 259 //   86 \r
 260 //   87 \r
 261 //   88 /*! \brief Sets the specified timer\r
 262 //   89  *\r
 263 //   90  * \param timer Specifies timer\r
 264 //   91  * \param min Minutes for timer to count down\r
 265 //   92  * \param sec Seconds for timer to count down\r
 266 //   93  * \param ms Milliseconds for timer to count down\r
 267 //   94  */\r
 268 \r
 269         RSEG CODE:CODE:NOROOT(1)\r
 270 //   95 void Time_Set(unsigned char timer, unsigned int min, unsigned char sec,\r
 271 Time_Set:\r
 272 //   96                                   unsigned char ms)\r
 273 //   97 {\r
 274         ST      -Y, R8\r
 275         ST      -Y, R6\r
 276         ST      -Y, R5\r
 277         ST      -Y, R4\r
 278         ST      -Y, R27\r
 279         ST      -Y, R26\r
 280         ST      -Y, R25\r
 281         ST      -Y, R24\r
 282         REQUIRE ?Register_R4_is_cg_reg\r
 283         REQUIRE ?Register_R5_is_cg_reg\r
 284         REQUIRE ?Register_R6_is_cg_reg\r
 285         REQUIRE ?Register_R8_is_cg_reg\r
 286         MOV     R4, R16\r
 287         MOV     R8, R17\r
 288         MOV     R6, R20\r
 289 //   98 //      timeval[i] = 4 * (1000*(sec + 60*min) + ms);   // about 4000 ticks per second\r
 290 //   99 //      timeval[i] = 240000 * (unsigned long)min;\r
 291 //  100 //      timeval[i] += 4000 * (unsigned long)sec;\r
 292 //  101 //      timeval[i] += 4 * (unsigned long)ms;\r
 293 //  102 \r
 294 //  103         timeval[timer] = 60000 * (unsigned long)min;\r
 295 //  104         timeval[timer] += 1000 * (unsigned long)sec;\r
 296 //  105         timeval[timer] += 1 * (unsigned long)ms;\r
 297         MOVW    R21:R20, R19:R18\r
 298         LDI     R22, 0\r
 299         LDI     R23, 0\r
 300         LDI     R16, 96\r
 301         LDI     R17, 234\r
 302         LDI     R18, 0\r
 303         LDI     R19, 0\r
 304         RCALL   ?L_MUL_L03\r
 305         MOVW    R25:R24, R17:R16\r
 306         MOVW    R27:R26, R19:R18\r
 307         MOV     R20, R8\r
 308         LDI     R21, 0\r
 309         LDI     R22, 0\r
 310         LDI     R23, 0\r
 311         LDI     R16, 232\r
 312         LDI     R17, 3\r
 313         LDI     R18, 0\r
 314         LDI     R19, 0\r
 315         RCALL   ?L_MUL_L03\r
 316         ADD     R16, R24\r
 317         ADC     R17, R25\r
 318         ADC     R18, R26\r
 319         ADC     R19, R27\r
 320         MOV     R20, R6\r
 321         LDI     R21, 0\r
 322         LDI     R22, 0\r
 323         LDI     R23, 0\r
 324         ADD     R20, R16\r
 325         ADC     R21, R17\r
 326         ADC     R22, R18\r
 327         ADC     R23, R19\r
 328         CLR     R5\r
 329         LSL     R4\r
 330         ROL     R5\r
 331         LSL     R4\r
 332         ROL     R5\r
 333         MOVW    R31:R30, R5:R4\r
 334         SUBI    R30, LOW((-(timeval) & 0xFFFF))\r
 335         SBCI    R31, (-(timeval) & 0xFFFF) >> 8\r
 336         ST      Z, R20\r
 337         STD     Z+1, R21\r
 338         STD     Z+2, R22\r
 339         STD     Z+3, R23\r
 340 //  106 }\r
 341         LD      R24, Y+\r
 342         LD      R25, Y+\r
 343         LD      R26, Y+\r
 344         LD      R27, Y+\r
 345         LD      R4, Y+\r
 346         LD      R5, Y+\r
 347         LD      R6, Y+\r
 348         LD      R8, Y+\r
 349         RET\r
 350 //  107 \r
 351 //  108 \r
 352 //  109 /*! \brief Stops timers\r
 353 //  110  *\r
 354 //  111  * Sets timer0's clock source to none.\r
 355 //  112  */\r
 356 \r
 357         RSEG CODE:CODE:NOROOT(1)\r
 358 //  113 void Time_Stop(void)\r
 359 Time_Stop:\r
 360 //  114 {\r
 361 //  115         TCCR0B = 0;\r
 362         LDI     R16, 0\r
 363         OUT     0x33, R16\r
 364 //  116 }\r
 365         RET\r
 366         REQUIRE _A_TCCR0B\r
 367 //  117 \r
 368 //  118 \r
 369 //  119 /*! \brief Starts timers\r
 370 //  120  *\r
 371 //  121  * Sets timer0's clock source to system clock divided by 64.\r
 372 //  122  */\r
 373 \r
 374         RSEG CODE:CODE:NOROOT(1)\r
 375 //  123 void Time_Start(void)\r
 376 Time_Start:\r
 377 //  124 {\r
 378 //  125         TCCR0B = (0<<CS02)|(1<<CS01)|(1<<CS00);         // CLKT0 = CLK/64 = 125 kHz.\r
 379         LDI     R16, 3\r
 380         OUT     0x33, R16\r
 381 //  126 }\r
 382         RET\r
 383         REQUIRE _A_TCCR0B\r
 384 //  127 \r
 385 //  128 \r
 386 //  129 /*! \brief Initializes timers\r
 387 //  130  *\r
 388 //  131  * Resets all the timer values to 0, then sets up timer 0 for a compare match\r
 389 //  132  * every millisecond.\r
 390 //  133  */\r
 391 \r
 392         RSEG CODE:CODE:NOROOT(1)\r
 393 //  134 void Time_Init(void)\r
 394 Time_Init:\r
 395 //  135 {\r
 396 //  136         unsigned char i;\r
 397 //  137         \r
 398 //  138         for (i = 0; i<<TIMERS; i++)     {\r
 399 //  139                 timeval[i] = 0;\r
 400 //  140         }\r
 401 //  141 \r
 402 //  142         //    OCR0A = 0;  // Doesn't matter, will run in normal mode.\r
 403 //  143         \r
 404 //  144         OCR0A = 125;  // Will give a compare match every ms.\r
 405         LDI     R16, 125\r
 406         OUT     0x13, R16\r
 407 //  145         \r
 408 //  146         OCR0B = 0;  // Doesn't matter, will run in normal mode.\r
 409         LDI     R16, 0\r
 410         OUT     0x12, R16\r
 411 //  147 \r
 412 //  148                 //    TCCR0A = 0;  // Normal 8-bit mode, no input capture.\r
 413 //  149 \r
 414 //  150         TCCR0A = (1<<WGM00);  // 8-bit CTC mode.\r
 415         LDI     R16, 1\r
 416         OUT     0x15, R16\r
 417 //  151         \r
 418 //  152         //    TCCR0B = (0<<CS02)|(1<<CS01)|(0<<CS00);  // CLKT0 = CLK/8 = 1 MHz.\r
 419 //  153         \r
 420 //  154         TCCR0B = (0<<CS02)|(1<<CS01)|(1<<CS00);         // CLKT0 = CLK/64 = 125 kHz.\r
 421         LDI     R16, 3\r
 422         OUT     0x33, R16\r
 423 //  155 \r
 424 //  156         //    TIMSK |= (1<<TOIE0);      // Overflow interrupt enabled.\r
 425 //  157 \r
 426 //  158         TIMSK |= (1<<OCIE0A);  // Timer 0, Compare match A interrupt enabled.\r
 427         IN      R16, 0x39\r
 428         ORI     R16, 0x10\r
 429         OUT     0x39, R16\r
 430 //  159 \r
 431 //  160         // Enable interrupts, just in case they weren't already.\r
 432 //  161         __enable_interrupt();       \r
 433         SEI\r
 434 //  162 }\r
 435         RET\r
 436         REQUIRE _A_TIMSK\r
 437         REQUIRE _A_TCCR0B\r
 438         REQUIRE _A_TCCR0A\r
 439         REQUIRE _A_OCR0A\r
 440         REQUIRE _A_OCR0B\r
 441 \r
 442         ASEGN ABSOLUTE:DATA:NOROOT,01cH\r
 443 __?EECR:\r
 444 \r
 445         ASEGN ABSOLUTE:DATA:NOROOT,01dH\r
 446 __?EEDR:\r
 447 \r
 448         ASEGN ABSOLUTE:DATA:NOROOT,01eH\r
 449 __?EEARL:\r
 450 \r
 451         ASEGN ABSOLUTE:DATA:NOROOT,01fH\r
 452 __?EEARH:\r
 453 \r
 454         COMMON INTVEC:CODE:ROOT(1)\r
 455         ORG 28\r
 456 `??TICK_ISR??INTVEC 28`:\r
 457         RJMP    TICK_ISR\r
 458 \r
 459         RSEG INITTAB:CODE:NOROOT(0)\r
 460 `?<Segment init: NEAR_Z>`:\r
 461         DW      SFE(NEAR_Z) - SFB(NEAR_Z)\r
 462         DW      SFB(NEAR_Z)\r
 463         DW      0\r
 464         REQUIRE ?need_segment_init\r
 465 \r
 466         END\r
 467 // \r
 468 //   5 bytes in segment ABSOLUTE\r
 469 // 290 bytes in segment CODE\r
 470 //   6 bytes in segment INITTAB\r
 471 //   2 bytes in segment INTVEC\r
 472 //  16 bytes in segment NEAR_Z\r
 473 // \r
 474 // 290 bytes of CODE memory (+ 8 bytes shared)\r
 475 //  16 bytes of DATA memory (+ 5 bytes shared)\r
 476 //\r
 477 //Errors: none\r
 478 //Warnings: none\r